Wireless base stations are changing from conventional radio frequency (RF) signal chains to RF sampling ADC, thus avoiding use of multiple components such as mixers and filters. RF sampling ADC enables majority of signal processing in digital domain instead of utilizing expensive analog signal chains. RF sampling ADC also enables complete spectral sampling and multi-band support.
An RF sampling ADC that supports a sampling rate of the order of giga-sample-per-second (GSPS) requires multiple pipelined ADCs. To minimize the power consumption of RF sampling ADC, residue amplifiers are shared between a set of interleaved channels of pipelined ADCs. A residue amplifier is an open loop amplifier, and a hold time of the residue amplifier for each interleaved channel is of the order of 300 ps with no reset phase. This results in significant settling and memory errors.
Due to open loop amplifier structure of the residue amplifier, an amplifier gain is different from an ideal value. The error in amplifier gain, settling errors and memory errors vary across devices and across temperature. These errors result in degradation of RF sampling ADC performance.